Method of manufacturing a dielectric isolation substrate
US5420064A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1994 |
| Grant date | May 30, 1995 |
| Priority date | — |
| Expiry date | Sep 22, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to this invention, there is provided a method of manufacturing a semiconductor device, including the steps of anisotropically etching a surface of an n-type monocrystalline silicon substrate having the (100) plane to form a V-shaped isolation groove having a depth d.sub.1, performing ion implantation and performing annealing and diffusion to a surface of the V-shaped isolation groove to form an n.sup.+ -type buried layer, depositing a silicon dioxide film having a thickness d.sub.2 on a surface of the n.sup.+ -type buried layer, forming a polycrystalline silicon film on a surface of the silicon dioxide film, abrading and polishing the polycrystalline silicon film to have a thickness d.sub.3, adhering a monocrystalline silicon support substrate having a thickness d.sub.4 to a polished surface of the polycrystalline silicon film at room temperature in the atmospheric air, abrading and polishing a lower surface of the n-type monocrystalline silicon substrate having the V-shaped isolation groove to expose the silicon dioxide film at a bottom portion of the V-shaped isolation groove on the lower surface and to form an island-like monocrystalline silicon film, wherein the thick…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.