Semiconductor wafer polisher and method
US5422316A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 1994 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Mar 18, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A semiconductor wafer polisher of the present invention for polishing at least one semiconductor wafer to flatten a first face of the wafer and reduce the thickness of the wafer from an initial thickness t.sub.1 to a predetermined final thickness t.sub.2. The polisher comprises a first surface including a polishing surface portion, a second surface including a second surface portion, and a wafer carrier for holding the semiconductor wafer between the polishing surface portion and the second surface portion. At least one polishing limiter is between the first and second surfaces for limiting the reduction in thickness of the wafer. The wafer carrier and polishing limiter are integrally formed such that the polishing limiter and wafer carrier constitute a single unitary piece. The polishing limiter has at least one rubbing surface adapted for rubbing against one of the first and second surfaces and is sized and configured such that the rubbing surface is spaced axially from the one of the first and second surfaces when the semiconductor wafer has the thickness t.sub.1 and such that the rubbing surface rubs against the one of the first and second surfaces and the polishing limiter ext…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.