System for addressing a very large memory with real or virtual addresses using address mode registers

US5423013A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Richard I. Baum · Poughkeepsie, US
• Brent Carlson · Sollentuna, SE
• Moon J. Kim · Wappingers Falls, US
• Michael G. Mall · Olivehurst, US
• Casper A. Scalzi · Poughkeepsie, US
• Bhaskar Sinha · Hyderabad, IN

Key dates

• Filing date: Sep 4, 1991
• Grant date: Jun 6, 1995
• Expiry date: Sep 4, 2011

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/206
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Allows instructions and data to be located in any one or more of plural sections of a large-size real memory of a data processing system. Any memory section is located by concatenating a conventional small real/absolute address with an address extender used with conventional small-size memory. A Central Processor Extended Address Mode (CPEAM) register content indicates the location of extenders in an AR(s), ASTE(s), STE(s) or PTE(s) for use by a central processor or I/O operations. An Input-Output Extended Address Mode (IOEAM) register content indicates the location of the extenders in ORB(s), CCW(s) or IDAW(s) for use by I/O operations. A compatible mode sets the content to zero for either or both of the CPEAM and IOEAM if either or both is not to be used.