Michael G. Mall
21Patents
12h-index
34Co-inventors
81Inventor score
Filing activity: Feb 10, 1988 → Feb 22, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5163096A | Storage protection utilizing public storage key control | Physics | 112 | Expired |
| US6237035A | System and method for preventing duplicate transactions in an internet browser/internet server environment | Physics | 88 | Expired |
| US5546582A | Extension of two phase commit protocol to distributed participants | Physics | 73 | Expired |
| US5023773A | Authorization for selective program access to data in multiple address spaces | Physics | 71 | Expired |
| US5925125A | Apparatus and method for pre-verifying a computer instruction set to prevent the initiation of the execution of undefined instructions | Physics | 62 | Expired |
| US5220669A | Linkage mechanism for program isolation | Physics | 47 | Expired |
| US4979098A | Multiple address space token designation, protection controls, designation translation and lookaside | Physics | 42 | Expired |
| US4945480A | Data domain switching on program address space switching and return | Physics | 40 | Expired |
| US6725252B1 | Method and apparatus for detecting and processing multiple additional requests from a single user at a server in a distributed data processing system | Electricity | 17 | Expired |
| US5740437A | Separating work unit priority and accountability from address spaces | Physics | 16 | Expired |
| US5423013A | System for addressing a very large memory with real or virtual addresses using address mode registers | Physics | 13 | Expired |
| US5640503A | Method and apparatus for verifying a target instruction before execution of the target instruction using a test operation instruction which identifies the target instruction | Physics | 12 | Expired |
| US8127277B2 | Framework for conditionally executing code in an application using conditions in the framework and in the application | Physics | 11 | Active |
| US8136111B2 | Managing execution of mixed workloads in a simultaneous multi-threaded (SMT) enabled system | Physics | 11 | Active |
| US5493661A | Method and system for providing a program call to a dispatchable unit's base space | Physics | 5 | Expired |
| US8327368B2 | Managing execution of mixed workloads in a simultaneous multi-threaded (SMT) enabled system | Physics | 4 | Active |
| US7793149B2 | Kernel error recovery disablement and shared recovery routine footprint areas | Physics | 2 | Active |
| US8949798B2 | Framework for conditionally executing code in an application using conditions in the framework and in the application | Physics | 1 | Active |
| US7783920B2 | Recovery routine masking and barriers to support phased recovery development | Physics | 1 | Active |
| US7562260B2 | Method and system for performing recovery of a single-threaded queue | Physics | 0 | Active |
| US8484420B2 | Global and local counts for efficient memory page pinning in a multiprocessor system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.