Intermodule test across system bus utilizing serial test bus
US5423050A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1994 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Sep 23, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318558
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Intermodule testing in a computer system including a plurality of modules interconnected via a system bus is performed by means of a serial test bus which is incorporated into the computer system for testing components, for example integrated circuits, used to construct the modules of the computer system. Intermodule test data is maintained in memory on each of the modules and is accessible through operations of the serial test bus. Intermodule test data is retrieved by the serial test bus and used to set up the modules so that one module drives the system bus with test signals defined by test vectors included within the intermodule test data. The remaining modules are set up to receive the test signals. Tables are developed in accordance with the intermodule test data to define which test signals drive which system bus leads and also which receiving modules receive the test signals. The signals which are received by the modules set up to receive the test signals are sampled and compared to what signals should have been received to detect errors in intermodule communications. The selection of the module used to drive the system bus is rotated until all modules have driven the syste…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.