David L. Simpson
19Patents
11h-index
18Co-inventors
65Inventor score
Filing activity: Apr 3, 1989 → Nov 8, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5423050A | Intermodule test across system bus utilizing serial test bus | Physics | 99 | Expired |
| US5325368A | JTAG component description via nonvolatile memory | Physics | 69 | Expired |
| US5343478A | Computer system configuration via test bus | Physics | 57 | Expired |
| US5377198A | JTAG instruction error detection | Physics | 42 | Expired |
| US5260950A | Boundary-scan input circuit for a reset pin | Physics | 27 | Expired |
| US5260948A | Bidirectional boundary-scan circuit | Physics | 24 | Expired |
| US5267191A | FIFO memory system | Physics | 19 | Expired |
| US5432854A | Stereo FM receiver, noise control circuit therefor | Electricity | 18 | Expired |
| US5313470A | Boundary-scan input cell for a clock pin | Physics | 13 | Expired |
| US7468754B2 | High-definition de-interlacing and frame doubling circuit and method | Emerging Cross-Sectional Technologies | 12 | Expired |
| US5319646A | Boundary-scan output cell with non-critical enable path | Physics | 12 | Expired |
| US6741436B2 | Microprocessor-controlled DC to DC converter with fault protection | Electricity | 10 | Expired |
| US5347520A | Boundary-scan enable cell with non-critical enable path | Physics | 9 | Expired |
| US6894726B2 | High-definition de-interlacing and frame doubling circuit and method | Emerging Cross-Sectional Technologies | 7 | Expired |
| US5546592A | System and method for incrementing memory addresses in a computer system | Physics | 2 | Expired |
| USRE41496E1 | Boundary-scan input circuit for a reset pin | General | 1 | Active |
| US6839779B2 | Counting a number of occurrences of a first RTS (ready to send) and a first RTR (ready to receive) signals for limiting a data transfer bandwidth through handshake suppression | Electricity | 1 | Expired |
| US4933894A | Circuit and method for adding binary numbers with a difference of one or less | Physics | 0 | Expired |
| US7031206B2 | Digital line delay using a single port memory | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.