Continuous superconductor to semiconductor converter circuit
US5424656A · kind A · utility
19Cited by
10References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 1993 |
| Grant date | Jun 13, 1995 |
| Priority date | — |
| Expiry date | May 7, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/195
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatus for converting superconductor low level signals to semiconductor signal levels utilizing a continuous superconductor to semiconductor converter circuit biased for maximum gain and without the need for a clocked reset signal. Employing a unique biasing arrangement utilizing two capacitors and one transistor, this circuit has long term bias voltage retention and good power supply noise rejection ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.