Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor
US5426613A · kind A · utility
10Cited by
9References
7Claims
0Family size
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Key dates
| Filing date | Nov 6, 1992 |
| Grant date | Jun 20, 1995 |
| Priority date | — |
| Expiry date | Nov 6, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.