Semi-subtractive circuitization
US5427895A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1993 |
| Grant date | Jun 27, 1995 |
| Priority date | — |
| Expiry date | Dec 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/072
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process for selective plating of a metal onto a substrate surface is provided. The process includes laminating a layer of conductive metal onto a dielectric substrate; and providing thru holes extending through said layer of conductive metal and said dielectric substrate. A thin layer of conductive metal is plated on the walls of the thru holes; and a photoresist layer is applied to the surface of the conductive metal and selectively exposed and developed to provide a mask corresponding to the negative of the desired circuit pattern. The exposed metal that is not covered by the photoresist is removed and then the remaining photoresist is removed to thereby provide the desired circuit pattern. A conductive metal is plated on the pattern up to the desired thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.