P-I-N MOSFET for ULSI applications

US5432366A · kind A · utility

Assignee

• The Board of Regents of the University of Texas System · US

Inventors

• Sanjay Banerjee · Austin, US
• Suryanarayana Shivakumar Bhattacharya · Irvine, US
• William T. Lynch · Apex, US

Key dates

• Filing date: May 28, 1993
• Grant date: Jul 11, 1995
• Expiry date: May 28, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0217

Abstract

A MOSFET device for ULSI circuits includes a semiconductor body having first and second spaced doped regions of a first conductivity type which function as source and drain regions, a third doped region between the first and second regions of a second conductivity type, and a first intrinsic region between the third doped region and the drain region, a channel of said MOSFET device including the third doped region and said first intrinsic region. Preferably the device further includes a second intrinsic region between the third doped region and the source region, the channel region of the MOSFET device including the third doped region, the first intrinsic region, and the second intrinsic region. The device further includes an insulating layer over the channel region and a gate electrode formed on the insulating layer over the channel region. A source electrode contact, the first doped region, and a drain electrode contact the second doped region. Several processes are described for fabricating the device.