High withstand voltage M I S field effect transistor and semiconductor integrated circuit
US5432370A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1994 |
| Grant date | Jul 11, 1995 |
| Priority date | — |
| Expiry date | Oct 7, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/105
Abstract
A semiconductor integrated circuit device is provided in which a highly reliable and low cost intelligent power semiconductor is mounted on the same substrate as that of a control circuit having a logic element, such as a low withstand voltage CMOS etc., and high withstand voltage and high current output MIS field effect transistor. A high withstand voltage MOSFET is composed of a vertical MOS portion 25 formed in one side of a laterally widened well layer 2 and a drain portion formed in the other side thereof and a second base layer 4 is formed on the surface of the well layer 2. Accordingly, a depletion layer widened just under the MOS portion 25 and the second base layer 4 develops a JFET effect at OFF time thereby realizing a high withstand voltage and reliability is provided since the generation of hot carriers can be prevented by the second base layer 4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.