Junction-isolated high-voltage MOS integrated device
US5434445A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1993 |
| Grant date | Jul 18, 1995 |
| Priority date | — |
| Expiry date | Apr 15, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/151
Abstract
An integrated device includes isolating regions of a first type of conductivity, each surrounding an epitaxial pocket of an opposite type of conductivity, and housing drain and source regions, and covered with an oxide layer housing gate regions and over which extend the source, drain and gate connections. For linearizing potential distribution at the epitaxial pocket-isolating region junction and close to the source regions beneath the connections, these regions are provided with a double chain of condensers embedded in the oxide layer and the terminal elements and the intermediate element of which are biased to predetermined potentials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.