Semiconductor process for manufacturing semiconductor devices with increased operating voltages
US5436179A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1994 |
| Grant date | Jul 25, 1995 |
| Priority date | — |
| Expiry date | Jan 5, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/01
Abstract
A bipolar transistor is formed on a substrate of a first (P) conductivity type by: forming a collector region (20) of the second conductivity type (N) in the substrate; forming an adjust region (27) of the first (P) conductivity type in the collector region (20); forming a base region (36) of the first (P) conductivity type in the collector region (20), the base region (36) containing the adjust region (27); and forming an emitter region (11) of the second (N) conductivity type in the adjust region (27). The base region (36) is deeper than and more heavily doped than the adjust region (27). The adjust region (27) alters the doping profile of the base-collector junction on the collector (20) side of the junction to increase the breakdown voltage of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.