High saturation current, low leakage current fermi threshold field effect transistor
US5440160A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 1994 |
| Grant date | Aug 8, 1995 |
| Priority date | — |
| Expiry date | Jan 5, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/378
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high saturation current, low leakage, Fermi threshold field effect transistor includes a predetermined minimum doping concentration of the source and drain facing the channel to maximize the saturation current of the transistor. Source and drain doping gradient regions between the source/drain and the channel, respectively, of thickness greater than 300 .ANG. are also provided. The threshold voltage of the Fermi-FET may also be lowered from twice the Fermi potential of the substrate, while still maintaining zero static electric field in the channel perpendicular to the substrate, by increasing the doping concentration of the channel from that which produces a threshold voltage of twice the Fermi potential. By maintaining a predetermined channel depth, preferably about 600 .ANG., the saturation current and threshold voltage may be independently varied by increasing the source/drain doping concentration facing the channel and by increasing the excess carrier concentration in the channel, respectively. A Fermi-FET having a gate insulator thickness of less than 120 .ANG., and a channel length of less than about 1 .mu.m can thereby provide a P-channel saturation current of at least 4 …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.