Thin-film transistor with suppressed off-current and V.sub.th
US5440168A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Feb 18, 1994 |
| Grant date | Aug 8, 1995 |
| Priority date | — |
| Expiry date | Feb 18, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6745
Abstract
A thin-film transistor (3, 5a, 5b and 5c) is covered with a first silicon nitride film (9) formed by an LPCVD method. A first silicon oxide film (6) is formed on the first silicon nitride film (9). A second silicon nitride film (7), i.e., passivation film which is formed by a plasma CVD method is provided on the first silicon oxide film (6). In addition, the thin-film transistor includes a semiconductor layer covering a gate electrode. The semiconductor layer includes source, drain and active regions. The active region preferably includes a smaller amount of fluorine than the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.