Fourth-order cascaded sigma-delta modulator
US5442354A · kind A · utility
8Cited by
9References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 21, 1993 |
| Grant date | Aug 15, 1995 |
| Priority date | — |
| Expiry date | Dec 21, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/418
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of cascading two second-order sigma-delta modulators includes the steps of feeding the input to the quantizer of the first stage to the second stage. This input is, effectively, the difference between the output of the first second-order loop and the quantization noise of the first modulator. The method also includes the step of removing both the quantization noise from the first loop as well as the output from the first loop from a final output, y.sub.out.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.