Method for manufacturing a capacitor of a semiconductor memory device
US5444005A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1994 |
| Grant date | Aug 22, 1995 |
| Priority date | — |
| Expiry date | May 19, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/947
Abstract
A method for manufacturing a capacitor of a semiconductor memory device. A conductive layer is formed on the semiconductor substrate and a photoresist pattern is formed on the conductive layer. The conductive layer is etched, using the photoresist pattern as a mask to form a first step-portion in the conductive layer. A first spacer is formed on a sidewall of the photoresist pattern, which may be formed by flowing the photoresist pattern. The conductive layer is etched, using the first spacer as a mask, to form a second step-portion in the conductive layer. The photoresist pattern and the first spacer is removed. A first material layer is formed on the entire surface of the resultant structure and etched to form a second spacer on the sidewalls of the first and second step-portions. The conductive layer is etched, using the second spacer as a mask, to form a storage electrode of a capacitor. Cell capacitance may be increased by a simple process, and the heat cycle may be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.