Semiconductor device including semiconductor layer having impurity region and method of manufacturing the same
US5446301A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1994 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Jul 13, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A semiconductor device capable of effectively preventing a dielectric breakdown of a gate oxide film without adversely affecting the characteristics of a transistor and a process of manufacturing the same are disclosed. The semiconductor device comprises a SOI film 2 whose upper angular parts are rounded off by sputter etching and a gate oxide film 3 formed on SOI film 2 with an almost uniform thickness. Therefore, electric field concentration in the upper angular parts of SOI film 2 is reduced. Furthermore, the control characteristics of the transistor are enhanced by the uniform gate oxide film 3. As a result, a dielectric breakdown of the gate oxide film is effectively prevented without adversely affecting the characteristics of the transistor. Sputter etching enabling processing at a low temperature is used, so that the upper angular parts of SOI film 2 are rounded off without adversely affecting a semiconductor element formed in the lower layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.