Integrated circuit power device with external disabling of defective devices and method of fabricating same
US5446310A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1992 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Jun 8, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit power device includes many cell blocks which are electrically connected in parallel, with each of the cell blocks including at least one cell such as MOSFET, electrically connected in parallel. External measurement access means such as test pads are electrically connected to each cell block, so that the cell blocks can be externally measured and a defective cell block can be identified. Externally activated disabling means such as fusible links are also provided, so that the fusible links connected to defective cell blocks can be opened. An operable integrated circuit power device is thereby obtained, notwithstanding a defective cell block. The fusible links are incapable of automatic activation in response to the defect in the cell block, but are externally opened upon detection of a defective cell block. By decoupling the defect measurement and cell disabling functions, low levels of leakage current may be specified for the power device. The fusible links are preferably formed using the same mask and material as the gate electrode, so that extra fabrication steps are not needed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.