Fourth-order cascaded sigma-delta modulator
US5446460A · kind A · utility
13Cited by
10References
3Claims
0Family size
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Key dates
| Filing date | Nov 3, 1993 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Nov 3, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/418
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of cascading sigma-delta modulators includes the step of feeding the input to the quantizer of each modulator stage to the subsequent stage. Therefore, the signal which is fed to each of the subsequent stages is the difference between the output and the quantization noise of the previous stage. The method also includes the step of removing the quantization noise of the first two stages, as well as the output of the first two stages, so that the final output of the cascaded modulators is a delayed version of the input, plus a scaled version of the last stage which has been shaped with a fourth-order high pass function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.