Pulsed ground circuit for CAM and PAL memories
US5446685A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 23, 1993 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Feb 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content-addressable memory wherein match transistors are prevented from discharging a match line by either placing transistors in series with the match transistors and only turning them on during a match sensing period, or a match sense line which is driven near the precharge voltage of the match line until the match sensing period. The match sensing line also provides charging current to recharge the match line. For some applications, a differential match line amplifier is used to detect matches and mismatches. The match sense line can be used with a CAM having a four-transistor comparator. The invention is also applicable to match lines in programmable-array logic (PAL) cells, and for either NMOS or PMOS circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.