Semiconductor memory device for selecting and deselecting blocks of word lines
US5452251A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1993 |
| Grant date | Sep 19, 1995 |
| Priority date | — |
| Expiry date | Jun 22, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has 2.sup.n word lines, a plurality of bit lines, a plurality of nonvolatile memory cells disposed at each intersection of the word lines and the bit lines, a write circuit for writing data to a memory cell located at an intersection of selected ones of the word lines and the bit lines, and a sense amplifier for reading data out of the memory cells. Further, the semiconductor memory device comprises a first unit for simultaneously selecting a block of 2.sup.m (n>m) word lines among the 2.sup.n word lines, and a second unit for not selecting a block of 2.sup.k (m>k) word lines among the 2.sup.m word lines. The second unit does not select the block of 2.sup.k word lines, and selects a block of 2.sup.k word lines prepared outside the 2.sup.n word lines when any one of the 2.sup.k word lines among the 2.sup.m word lines is defective. Consequently, redundant word lines are effectively employed, write and verify operations are stable, and thereby the yield and performance of the semiconductor memory device are improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.