Digital jitter correction method and signal preconditioner
US5452333A · kind A · utility
57Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1992 |
| Grant date | Sep 19, 1995 |
| Priority date | — |
| Expiry date | Jun 19, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/205
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods for modifying an incoming binary serial data stream to reduce the Duty Cycle Distortion jitter which involves comparing the time between adjacent transitions and correcting the jitter by inserting delay before the early transition for reducing the peak-to-peak distribution of said jitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.