Method and apparatus for simultaneously minimizing storage and maximizing total memory bandwidth for a repeating pattern
US5454076A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1994 |
| Grant date | Sep 26, 1995 |
| Priority date | — |
| Expiry date | Mar 2, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/393
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image is written to a data frame buffer for display by a monitor. The image includes a repeated pattern. The present invention uses a repeated pattern cache which is not large enough to simultaneously contain an entire repeated pattern. When writing a pixel of the image, a horizontal pattern offset and a vertical pattern offset for a destination location of the pixel are determined. If a scan line for the repeated pattern which corresponds to the vertical pattern offset does not reside in the repeated pattern cache, the scan line for the repeated pattern which corresponds to the vertical pattern offset is fetched into the repeated pattern cache. When the scan line for the repeated pattern which corresponds to the vertical pattern offset resides in the repeated pattern cache, the pixel is accessed at a location in the repeated pattern cache at a location which corresponds to the horizontal pattern offset. The accessed pixel is written to the buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.