Process for formation of an isolating layer for a semiconductor device
US5457067A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 14, 1994 |
| Grant date | Oct 10, 1995 |
| Priority date | — |
| Expiry date | Oct 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for formation of an isolating layer for a semiconductor device is disclosed. During formation of a field isolating layer, a pad oxide layer is formed which is intended to buffer the difference of the thermal expansion rates between the silicon substrate and a nitride layer. First and second side wall spacers are formed, so that the flow of the oxidant into the buffering pad oxide layer should be inhibited, and that the damage-causing shear stress should be reduced. Thus the structural defect having the shape of the bird's beak is prevented, thereby securing a high density element region. Further, during the formation of a monocrystalline silicon, the growth thickness may be optimized, so that the resulting semiconductor device should be flattened, thereby simplifying the process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.