Diebonding geometry for packaging optoelectronics
US5460318A · kind A · utility
4Cited by
2References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1994 |
| Grant date | Oct 24, 1995 |
| Priority date | — |
| Expiry date | Jun 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/0237
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A solder geometry for epi-down diebonding an optoelectronic component to a heat sink platform includes a solder deposition pattern having exposure windows to create gaps or diebond bridges in the solder pattern. The active regions of the components are disposably registered within the gaps of the solder pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.