SiGe thin film or SOI MOSFET and method for making the same
US5461250A · kind A · utility
272Cited by
9References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1992 |
| Grant date | Oct 24, 1995 |
| Priority date | — |
| Expiry date | Aug 10, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6748
Abstract
A dual gate thin film or SOI MOSFET device having a sufficiently thin body thickness with one or more semiconductor channel layer(s) sandwiched by semiconductor layers having a different energy band structure to automatically confine carriers to the channel layer(s) without the need for channel grading or modulation doping. Preferred embodiments employ strained layer epitaxy having Si/SiGe/Si or SiGe/Si/SiGe semiconductor layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.