Formation of 3-dimensional silicon silicide structures
US5463254A · kind A · utility
18Cited by
12References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1994 |
| Grant date | Oct 31, 1995 |
| Priority date | — |
| Expiry date | Jul 25, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An epitaxial conductor and a method for forming buried conductor patterns is described incorporating a layer of single crystalline silicon, a pattern formed therein such as a trench, a layer of metal silicide epitaxial formed on the bottom surface of the pattern or trench, a layer of silicon epitaxially formed thereover, and a layer of metal silicide epitaxially formed over the silicon layer. The invention overcomes the problem of twinning defects in the top surface of epitaxial silicide layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.