Electronic modules with interconnected surface metallization layers and fabrication methods therefore

US5466634A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kenneth E. Beilstein, Jr. · South Burlington, US
• Claude L. Bertin · Venice, US
• John Cronin · Jericho, US
• Wayne J. Howell · Williston, US
• James M. Leas · South Burlington, US
• Robert B. Phillips · Orange Park, US

Key dates

• Filing date: Dec 20, 1994
• Grant date: Nov 14, 1995
• Expiry date: Dec 20, 2014

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/30107
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods of fabrication for electronic modules having electrically interconnected side and end surface metallization layers and associated electronic modules are set forth. The methods include providing a stack comprising a plurality of stacked IC chips. A side surface thin-film metallization layer is formed on the stack. Next, an end surface thin-film metallization layer is formed the stack such that the side surface and end surface thin-film metallization layers directly electrically interconnect. Alternatively, each IC chip of a stack may include an end surface metallization layer such that separate formation of an end surface metallization layer on an end surface of the stack is unnecessary. The methods also include forming an electronic module by first providing a long stack of IC chips, testing the chips of the stack, and then segmenting the long stack into multiple small stacks of functional IC chips based upon the test results. Specific details of electronic modules, IC chips contained therein, and stacks composed thereof are also set forth.