Method of manufacturing a metal interconnect with high resistance to electromigration
US5466638A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 16, 1994 |
| Grant date | Nov 14, 1995 |
| Priority date | — |
| Expiry date | Aug 16, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/927
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided which includes a conductive layer, an insulating film formed on the surface of the conductive layer, and a conductive metal interconnection layer formed on the insulating film and electrically connected to the conductive layer through a contact hole formed in a predetermine position of the insulating film. The conductive metal interconnection and the surface of the conductive layer are directly joined together and a silicon layer including a single crystal or polycrystalline silicon having a grain size of at least about 10 .mu.m is interposed between the conductive metal interconnection layer and the insulating film. The conductive metal interconnection layer becomes a single crystal or a polycrystal having a grain size of about 10 .mu.m or above under the influence of the crystalline properties of the underlying crystal of the silicon layer. Therefore, in the conductive metal interconnection layer in the entire region including the inside portion of the contact hole, essentially no grain boundaries exist. Thus, electromigration of conductive metal ions is controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.