Hierarchically connectable configurable cellular array
US5469003A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 5, 1993 |
| Grant date | Nov 21, 1995 |
| Priority date | — |
| Expiry date | Nov 5, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17756
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An field programmable gate array (FPGA) of cells arranged in rows and columns is interconnected by a hierarchical routing structure. Switches separate the cells into blocks and into blocks of blocks with routing lines interconnecting the switches to form the hierarchy. Also, select units for allowing memory bits to be addressed both individually and in large and arbitrary groups are disclosed. Further a control store for configuring the FPGA is addressed as an SRAM and can be dynamically reconfigured during operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.