Method of making field effect transistor
US5470767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1994 |
| Grant date | Nov 28, 1995 |
| Priority date | — |
| Expiry date | Oct 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a gate electrode having a leg with two mutually offset portions is formed by successively depositing on a semiconductor substrate an amorphous material and a crystalline metal layer. A portion of the crystalline metal layer is removed photolithographically and the amorphous material is etched to form a hole extending to the semiconductor substrate. The through hole is filled when a second amorphous material is deposited on the crystalline metal layer. A second hole is photolithographically prepared in the second amorphous material, partially aligned with the first hole and filled with a gate electrode material, and thereafter the second amorphous material, crystalline metal layer, and original amorphous material are removed, leaving a gate electrode having a leg with mutually offset portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.