Dual-channel emitter switched thyristor with trench gate
US5471075A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 1994 |
| Grant date | Nov 28, 1995 |
| Priority date | — |
| Expiry date | May 26, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/148
Abstract
A semiconductor switching device includes a plurality of adjacent and parallel-connected switching cells in a semiconductor substrate. Each cell includes a thyristor having a floating emitter region and a trench-gate field effect transistor (TFET) for providing turn-on and turn-off control of the thyristor. In one embodiment of the switching device, parasitic thyristor latch-up is suppressed by using a dual-channel TFET which forms both inversion-layer and accumulation-layer channel connections in series between respective floating emitter regions and the cathode contact. In another embodiment, parasitic thyristor latch-up is prevented by joining floating emitter regions of a pair of adjacent cells to thereby eliminate a parasitic P-N-P-N path between the anode and cathode contacts. According to this second embodiment, a dual-channel TFET is preferably used to form a separate first conductivity type inversion-layer channel adjacent a first sidewall of the trench and a second conductivity type inversion-layer channel adjacent a second opposing sidewall of the trench. These channels provide the necessary electrical connections for both gated turn-on and turn-off control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.