Wafer joined optoelectronic integrated circuits and method
US5472914A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Jul 14, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A full wafer to full wafer integrated circuit fabrication process wherein substrate removal and replacement of one wafer is used to enable an accurate alignment of this wafer with features of a receiving wafer during a see through alignment step. The invention is disclosed in terms of a wafer of photo field effect transistors being combined with a wafer of circuit devices that attend the photo field effect transistor devices. Use of the invention with the different material combination option desired for a photodetector device and its attending circuitry is also disclosed. Advantages over the more conventional chip by chip combination of wafer devices are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.