Semiconductor device of the LOC structure type having a flexible wiring pattern
US5473188A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 13, 1994 |
| Grant date | Dec 5, 1995 |
| Priority date | — |
| Expiry date | Jul 13, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device of the LOC (lead on chip) structure type according to the present invention, one ends of external connector leads are fixed to an insulating tape and the other ends thereof extend outside the insulating tape. Inner leads for internal wiring are arranged and fixed on the insulating tape, independently of the others. The insulating tape integral to both of these leads is fixed to the main surface of a semiconductor chip and the leads are connected to their corresponding electrode pads on the semiconductor chip via bonding wires. The insulating tape is bonded to a lead frame before the punching process and it thus made integral to the leads is then punched by the punching process. It therefore needs no bonding margin for the leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.