Interconnect carriers having high-density vertical connectors and methods for making the same
US5474458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1993 |
| Grant date | Dec 12, 1995 |
| Priority date | — |
| Expiry date | Jul 13, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R4/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Interconnect carriers for coupling integrated circuit chips to major substrates and methods for making the same are disclosed. The interconnect carrier comprises a relatively thin resilient supporting layer, a plurality of electrically conductive vias formed through the surfaces of the supporting layer, and an outer frame disposed around the periphery of the supporting layer. The supporting layer preferably comprises an electrically insulating material. The flexibility of the supporting layer enables the layer to more readily conform to the warpages of the IC chip and supporting substrate, while the outer frame provides mechanical support and prevents the supporting layer from folding, twisting, and/or stretching. The thickness of the supporting layer may be substantially reduced over that of prior art interposers to enable methods for constructing smaller diameter vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.