Method for forming fine patterns in a semiconductor device
US5476807A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1994 |
| Grant date | Dec 19, 1995 |
| Priority date | — |
| Expiry date | Apr 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a fine pattern, e.g., for forming the storage electrodes of the capacitors of the memory cells of semiconductor memory devices, which includes the steps of depositing a mask layer on the layer to be patterned, depositing a photoresist layer on the mask layer, patterning the photoresist layer, to thereby form a photoresist pattern, anisotropically etching the mask layer, using the photoresist pattern as an etching mask, to thereby form a mask layer pattern, wherein etch by-products are formed on sidewalls of a composite layer comprised of the photoresist pattern and the mask layer pattern, and, etching the layer to be patterned using the composite layer and the etch by-products as an etching mask, to thereby form a fine pattern. The mask layer is made of a material, e.g., a high-temperature oxide, having different physical properties than that of the photoresist. Further, the anisotropic etching process is preferably carried out by means of a plasma etching process using a mixture of CF.sub.4, CHF.sub.4, and Ar gases, with the amount of the etch by-products being controllably adjusted by the ratio of these gases, and/or by controllably adjusting the time, temper…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.