Method and structure for improving patterning design for processing
US5477466A · kind A · utility
10Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1994 |
| Grant date | Dec 19, 1995 |
| Priority date | — |
| Expiry date | Dec 22, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of interactive feedback in semiconductor processing is provided which compensates for lithographic proximity effects, reactive ion etch loading effects, electromigration and stress due to layering.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.