Method for emulating a circuit design using an electrically reconfigurable hardware emulation apparatus
US5477475A · kind A · utility
66Cited by
69References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1994 |
| Grant date | Dec 19, 1995 |
| Priority date | — |
| Expiry date | Jul 11, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.