Quickturn Design Systems, Inc.
🏢 View company profile →90Patents
11Active
90Granted
39Portfolio score
Filing activity: Jan 31, 1992 → Jun 24, 2009 · 11 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5452239A | Method of removing gated clocks from the clock nets of a netlist for timing sensitive implementation of the netlist in a hardware emulation system | Physics | 312 | Expired |
| US5425036A | Method and apparatus for debugging reconfigurable emulation systems | Physics | 291 | Expired |
| US5452231A | Hierarchically connected reconfigurable logic assembly | Physics | 198 | Expired |
| US6732068B2 | Memory circuit for use in hardware emulation system | Emerging Cross-Sectional Technologies | 197 | Expired |
| US6184707A | Look-up table based logic element with complete permutability of the inputs to the secondary signals | Physics | 176 | Expired |
| US5448496A | Partial crossbar interconnect architecture for reconfigurably connecting multiple reprogrammable logic devices in a logic emulation system | Physics | 145 | Expired |
| US5475830A | Structure and method for providing a reconfigurable emulation circuit without hold time violations | Physics | 127 | Expired |
| US5887158A | Switching midplane and interconnecting system for interconnecting large numbers of signals | Electricity | 126 | Expired |
| US5960191A | Emulation system with time-multiplexed interconnect | Emerging Cross-Sectional Technologies | 118 | Expired |
| US6020760A | I/O buffer circuit with pin multiplexing | Electricity | 117 | Expired |
| US6694464B1 | Method and apparatus for dynamically testing electrical interconnect | Physics | 100 | Expired |
| US6285211A | I/O buffer circuit with pin multiplexing | Electricity | 97 | Expired |
| US6446249B1 | Emulation circuit with a hold time algorithm, logic and analyzer and shadow memory | Physics | 92 | Expired |
| US5612891A | Hardware logic emulation system with memory capability | Physics | 92 | Expired |
| US6377912B1 | Emulation system with time-multiplexed interconnect | Emerging Cross-Sectional Technologies | 90 | Expired |
| US5841967A | Method and apparatus for design verification using emulation and simulation | Physics | 87 | Expired |
| US5943490A | Distributed logic analyzer for use in a hardware logic emulation system | Physics | 85 | Expired |
| US5819065A | System and method for emulating memory | Physics | 77 | Expired |
| US6618698B1 | Clustered processors in an emulation engine | Physics | 76 | Expired |
| US5661662A | Structures and methods for adding stimulus and response functions to a circuit design undergoing emulation | Physics | 72 | Expired |
| US5920712A | Emulation system having multiple emulator clock cycles per emulated clock cycle | Physics | 70 | Expired |
| US6002861A | Method for performing simulation using a hardware emulation system | Physics | 67 | Expired |
| US5477475A | Method for emulating a circuit design using an electrically reconfigurable hardware emulation apparatus | Physics | 66 | Expired |
| US5970240A | Method and apparatus for configurable memory emulation | Physics | 61 | Expired |
| US5940603A | Method and apparatus for emulating multi-ported memory circuits | Physics | 56 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.