Method of making a getterer for multi-layer wafers
US5478758A · kind A · utility
11Cited by
10References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1994 |
| Grant date | Dec 26, 1995 |
| Priority date | — |
| Expiry date | Jun 3, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/05
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a gettering structure for dielectrically isolated wafer structures, such as bonded wafers. A getterer layer is deposited over the wafer having semiconductor regions isolated from each other by trenches. The polysilicon is etched back leaving the polysilicon on the sides of the regions. The polysilicon may be doped. The polysilicon is oxidized and a second layer of polysilicon may be deposited to fill voids in the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.