Non-trenched buried contact for VLSI devices
US5479041A · kind A · utility
10Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 1994 |
| Grant date | Dec 26, 1995 |
| Priority date | — |
| Expiry date | Dec 12, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/768
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention describes a non-trenched buried contact for local interconnections in VLSI devices and provides a method for forming the non-trenched buried contact. By using trenched isolation and a trench polysilicon gate structure the buried contact process can be implemented so that there are no unwanted trenches formed in the area of the buried contact. The invention permits excellent planarization of the device prior to pre-metal dielectric and metal deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.