Addressable shadow port and protocol for serial bus networks
US5483518A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 24, 1995 |
| Grant date | Jan 9, 1996 |
| Priority date | — |
| Expiry date | Apr 24, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A protocol and associated circuitry operable for efficiently extending serial bus capability in system environments is described. The protocol is designed to coexist and be fully compatible with existing serial bus approaches, and in particular an example of application of the invention to a backplane system utilizing the 1149.1 IEEE standard serial bus is detailed. The circuitry and protocol required to couple any one of the boards on the backplane to the serial bus master without modifying the existing serial bus protocol, without adding additional signals, and without affecting the throughput rate of the serial bus is described. The invention advantageously allows the serial bus master to select, communicate with, and deselect backplane boards so that high level test functions may be simultaneously executed and monitored. Additional preferred embodiments are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.