Isolated DMOS IC technology
US5485027A · kind A · utility
137Cited by
22References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1992 |
| Grant date | Jan 16, 1996 |
| Priority date | — |
| Expiry date | Jun 24, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/085
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an integrated circuit, a wraparound isolation region capable of sustaining a high blocking voltage to a substrate encloses a variety of high voltage or low voltage device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.