Dielectric element isolated semiconductor device and a method of manufacturing the same
US5485030A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 11, 1995 |
| Grant date | Jan 16, 1996 |
| Priority date | — |
| Expiry date | Jan 11, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
Abstract
A high-breakdown voltage semiconductor device and a fabrication method are disclosed. A dielectric layer dielectrically isolates a semiconductor substrate from an n.sup.- type semiconductor layer. An n.sup.+ type semiconductor region having a lower resistance than the n.sup.+ type semiconductor layer is formed as if surrounded by a p.sup.+ type semiconductor region. The dielectric layer consists of a relatively thick first region and a relatively thin second region. The n.sup.+ type semiconductor region, which is located above the first region, occupies a narrower area than the first region. Thus, by forming the dielectric layer thick immediately under the first semiconductor layer and controlling the thickness of the dielectric layer at other potions, the breakdown voltage of the semiconductor device is improved without curbing RESURF effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.