Memory device with page select capability
US5485428A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 1994 |
| Grant date | Jan 16, 1996 |
| Priority date | — |
| Expiry date | May 24, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a memory device having page select capability. The serial access memory device provided includes a first data terminal and a memory cell array having a plurality of address locations. The serial access memory device includes a shift register, an address decode circuit and a page select device. The page select device, in response to the access control signal, the address clock signal and the clock signal, selectively stores a page number therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.