Ferroelectric interruptible read memory
US5487030A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1994 |
| Grant date | Jan 23, 1996 |
| Priority date | — |
| Expiry date | Aug 26, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes a first ferroelectric capacitor and a second ferroelectric capacitor electrically connected in a parallel arrangement, and writing circuitry that writes controllably different polarization states into the two ferroelectric capacitors using a single input signal. Read circuitry senses the difference in stored polarizations in the first ferroelectric capacitor and the second ferroelectric capacitor. This sensing circuit causes only a partial switching of the polarization state of the first ferroelectric capacitor and does not disturb the polarization state of the second ferroelectric capacitor. There is a restoration circuit to restore the original ferroelectric polarization of the ferroelectric capacitors following reading.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.