Layout for radio frequency power transistors
US5488252A · kind A · utility
21Cited by
12References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 16, 1994 |
| Grant date | Jan 30, 1996 |
| Priority date | — |
| Expiry date | Aug 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A layout is provided for RF power transistors that reduces common lead inductance and its associated performance penalties. An RF transistor cell is rotated 90.degree. with respect to a conventional RF transistor cell so as to located bond pads nearer the edge of a silicon die, reducing bond wire length and common lead inductance and thereby improving performance at high frequencies. The placement of bond pad and distribution of different parts of the transistor layout further reduces common lead inductance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.