Patent · US Expired

Voltage divider and use as bias network for stacked transistors

US5493207A · kind A · utility

20Cited by
8References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJun 4, 1993
Grant dateFeb 20, 1996
Priority date—
Expiry dateJun 4, 2013

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F3/24
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A voltage divider including a plurality of series connected depletion mode field effect transistors having their gates and sources biased to operate in saturation mode for the operating range of the divider, Preferably, the gates and sources are connected together, A series resistor adjusts the value of the divider element. A parallel resistor defines the output resistance of the divider element. The voltage divider may be used as a biasing network for stacked transistors. A buffer may be provided between the voltage divider and the control terminal of the stacked transistors. The voltage divider may be used to bias follower stages and the input stages of an operational amplifier.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.