Adaptive programming method for antifuse technology
US5498979A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 1994 |
| Grant date | Mar 12, 1996 |
| Priority date | — |
| Expiry date | Sep 20, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
For antifuse programmable integrated circuit devices, in particular FPGA devices, the invention allows for alternative routing around antifuses which fail to program. The chip architecture includes wiring segments and antifuses which together allow for alternative routes around every antifuse in the event of failure of that antifuse. The method includes programming the device under control of a computer which can recalculate routes in the event of an antifuse which fails to program. Preferably the initial routing distributes unused wiring segments through the chip to be available for routing around a failed antifuse. When a failure occurs, the method includes determining an alternative route around every failed antifuse. The alternative route may be established directly after the antifuse has failed or after all initially selected antifuses have been programmed. The method also includes swapping of logic cell inputs, logic cells, and/or logic blocks from their original layout to adapt to a failed antifuse without changing the timing of signals which would have used the failed antifuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.